Your scope isn't fast enough.When I then setup the dtoverlay in the config.txt file as shown below, I notice that the DSI1 D0+/- lanes are operating but the DSI clock lines are not doing anything. And its sitting around ~0.2V.Code:
dtoverlay=vc4-kms-v3ddtoverlay=vc4-kms-dsi-generic,clock-frequency:24600000,hactive:800,hfront-porch:8,hsync-len:4,hback-porch:8,vfront-porch:8,vsync-len:4,vback-porch:8
A pixel clock of 24.6MHz at 24bpp over 1 data lane is 590Mbit/s. DSI transfers data on on both edges of the clock, so the clock lane will be running at at least 295.2MHz. vc4 needs to increase that slightly because of the clock structure, so I suspect you're getting 300MHz.
D-PHY High Speed (HS) mode uses 100mV and 300mV as the two signalling levels, so you're seeing an averaged value.
As above, HS mode is 100mV and 300mV.The other DSI lanes are sitting around 1V fixed. The dtoverlay is only configured for one lane right now so I'm not expecting the other lanes to do anything.
The other mode of operation is Low Power (LP), which uses 1.2V and 0V for high and low. The data lane is likely to drop to LP between frames, if not between lines (it depends on blanking timings)
Statistics: Posted by 6by9 — Thu Mar 28, 2024 11:57 am