OK, Super close now.
I changed my sc16is752-spi4.dts by using sc16is752-spi0.dts as my base instead of spi1.
I now see:
The new sc16is752-spi4.dts:Initially, in the sc16is752: sc16is752@0 section of fragment0, the reg = <1>; /* CE1 */, but the compiler complained about that, so I moved it to 0. Can you help me understand what it should be? Is zero ok?
Also, the pin settings are now correct.
I changed my sc16is752-spi4.dts by using sc16is752-spi0.dts as my base instead of spi1.
I now see:
- /dev/gpiochip2
/dev/ttySC0
/dev/ttySC1
The new sc16is752-spi4.dts:
Code:
// Definitions for SC16IS752 UART on spi4.1// src: https://github.com/raspberrypi/linux/blob/rpi-5.4.y/arch/arm/boot/dts/overlays/sc16is752-spi0-overlay.dts// This code is released under GPL 2.0/dts-v1/;/plugin/;/ {compatible = "brcm,bcm2835";fragment@0 {target = <&spi4>;__overlay__ {#address-cells = <1>;#size-cells = <0>;status = "okay";sc16is752: sc16is752@0 {compatible = "nxp,sc16is752";reg = <0>; /* CE1 */clocks = <&sc16is752_clk>;interrupt-parent = <&gpio>;interrupts = <17 2>; /* IRQ_TYPE_EDGE_FALLING */gpio-controller;#gpio-cells = <2>;spi-max-frequency = <4000000>;};};};fragment@1 {target = <&spidev1>;__overlay__ {status = "disabled";};};fragment@2 {target-path = "/";__overlay__ {sc16is752_clk: sc16is752_spi4_0_clk {compatible = "fixed-clock";#clock-cells = <0>;clock-frequency = <14745600>;};};};};Also, the pin settings are now correct.
Statistics: Posted by mhaines4102 — Sat Jan 11, 2025 1:29 am