Big thank you for all the information. I gotta properly read the SMBus specs one of these days... ![:D]( "Very Happy")
To clarify, it's the pull-downs that are enabled at reset. When I started Picos last year, I had trouble communicating with an IR receiver and so I found out about pull downs the hard way. I'm paranoid about it now -- I disable all pulls and enable the pull ups, the latter shouldn't hurt the I2C. IIRC one of the I2C app note example in an earlier doc release does not disable the pull downs, so I think it is something easily overlooked. Also, the RP2040 datasheet guarantees ROSC to be within 1.8MHz to 12MHz -- it sounds like the variability of a 40 nm process is considerable and if a pull-down pseudo-resistor is near one end of the curve, then overlooking it might be unwise.
[Edit] If, in the code above, both pulls end up being enabled, they will act in tandem as a weak latch and maybe SMBus comms is improved. You should test with both pulls disabled too.
To clarify, it's the pull-downs that are enabled at reset. When I started Picos last year, I had trouble communicating with an IR receiver and so I found out about pull downs the hard way. I'm paranoid about it now -- I disable all pulls and enable the pull ups, the latter shouldn't hurt the I2C. IIRC one of the I2C app note example in an earlier doc release does not disable the pull downs, so I think it is something easily overlooked. Also, the RP2040 datasheet guarantees ROSC to be within 1.8MHz to 12MHz -- it sounds like the variability of a 40 nm process is considerable and if a pull-down pseudo-resistor is near one end of the curve, then overlooking it might be unwise.
[Edit] If, in the code above, both pulls end up being enabled, they will act in tandem as a weak latch and maybe SMBus comms is improved. You should test with both pulls disabled too.
Statistics: Posted by katak255 — Sat Jan 11, 2025 3:04 am