Ah, right, that makes sense. I'll have to see if it's possible to juggle bus priorities and memory areas to minimise or eliminate contention.
With regard to the data packing, it's currently deliberately inefficient to simulate the demands of the fully fledged system. I was aiming for 4 fully independent channels, each having its own SM+2xDMA+waveform RAM. But if it turns out I have to sacrifice flexibility for efficiency, so be it.
Many thanks for your help. I'll try to remember to report back ... nothing more frustrating than a forum thread that might be relevant, but the OP never returned to say whether or not they got it working![Sad :(]()
With regard to the data packing, it's currently deliberately inefficient to simulate the demands of the fully fledged system. I was aiming for 4 fully independent channels, each having its own SM+2xDMA+waveform RAM. But if it turns out I have to sacrifice flexibility for efficiency, so be it.
Many thanks for your help. I'll try to remember to report back ... nothing more frustrating than a forum thread that might be relevant, but the OP never returned to say whether or not they got it working

Statistics: Posted by h4yn0nnym0u5e — Fri Oct 04, 2024 8:33 am